1. Field of the Invention
This invention generally relates to computer-implemented methods, carrier media, to and systems for determining sizes of defects detected on a wafer. Certain embodiments relate to a computer-implemented method for separating the defects into groups by defect type, separating the defects into subgroups by size, aspect ratio, gradient, or some combination thereof, and determining the sizes of the defects in different subgroups separately.
2. Description of the Related Art
The following description and examples are not admitted to be prior art by virtue of their inclusion in this section.
Fabricating semiconductor devices such as logic and memory devices typically includes processing a substrate such as a semiconductor wafer using a large number of semiconductor fabrication processes to form various features and multiple levels of the semiconductor devices. For example, lithography is a semiconductor fabrication process that involves transferring a pattern from a reticle to a resist arranged on a semiconductor wafer. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical-mechanical polishing, etch, deposition, and ion implantation. Multiple semiconductor devices may be fabricated in an arrangement on a single semiconductor wafer and then separated into individual semiconductor devices.
Inspection processes are used at various steps during a semiconductor manufacturing process to detect defects on wafers to promote higher yield in the manufacturing process and thus higher profits. Inspection has always been an import part of fabricating semiconductor devices such as integrated circuits. However, as the dimensions of semiconductor devices decrease, inspection becomes even more important to the successful manufacture of acceptable semiconductor devices because smaller defects can cause the devices to fail. For instance, as the dimensions of semiconductor devices decrease, detection of defects of decreasing size has become necessary since even relatively small defects may cause unwanted aberrations in the semiconductor devices.
Many different types of inspection tools have been developed for the inspection of semiconductor wafers. Defect inspection is currently being performed using techniques such as bright field (BF) imaging, dark field (DF) imaging, and scattering. The type of inspection tool that is used for inspecting semiconductor wafers may be selected based on, for example, characteristics of the defects of interest and characteristics of the wafers that will be inspected. For example, some inspection tools are designed to inspect unpatterned semiconductor wafers or patterned semiconductor wafers.
Inspection tools for unpatterned wafers are generally not capable of inspecting patterned wafers for a number of reasons. For example, many unpatterned wafer inspection tools are configured such that all of the light collected by a lens or another collector is directed to a single detector that generates a single output signal representative of all of the collected light. Therefore, light scattered from patterns or other features on the specimen will be combined with other scattered light. As such, light scattered from patterns or other features on the wafer cannot be separated from other scattered light thereby hindering, if not preventing, defect detection.
Patterned wafer inspection is of particular interest and importance to the semiconductor industry because processed semiconductor wafers usually have a pattern of features formed thereon. Although inspection of unpatterned wafers, or “monitor wafers,” which have been run through a process tool, may be used as a gauge for the number and types of defects that may be found on patterned wafers, or “product wafers,” defects detected on monitor wafers do not always accurately reflect the defects that are detected on patterned wafers after the same process in the same process tool. Inspection of patterned wafers is, therefore, important to accurately detect defects that may have been formed on the wafer during, or as a result of processing. Therefore, inspecting patterned wafers or product wafers may provide more accurate monitoring and control of processes and process tools than inspection of monitor wafers.
Semiconductor processes can also be better controlled when more information and more accurate information about the defects detected on wafers is available for monitoring and controlling the processes. Therefore, it is desirable and advantageous to determine information about the defects such as size and to determine such information accurately. In general, two methods have been previously used for reporting defect size from dark field inspection systems. One method includes using defect pixel count to report defect size. Another method includes using scattering intensity from one channel of the dark field inspection system to report defect size.
There are, however, a number of disadvantages to these previously used methods for determining defect size. For instance, using defect pixel count reported by a scanning inspection system as the size can be substantially inaccurate and misleading. In addition, each pixel in the scanning inspection system can be as large as several microns. Therefore, the error in the defect size can be on the order of several microns. Dark field scanning systems do not resolve the defect shape since the point spread function (PSF) is typically several pixels in extent.
In another instance, using scattering intensity to report defect size is more accurate than using pixel count since the scattering intensity is typically some function of defect size. However, there are several factors making the size reporting inaccurate using scattering intensity only. For example, defect shape and cross section profile can affect the scattering intensity. In addition, materials may also affect the scattering intensity. Moreover, the surface roughness may affect scattering intensity. Therefore, the performance of this method is usually only good on particles and is poor for other defect types such as flat, planar, and void types of defects.
Accordingly, it would be advantageous to develop computer-implemented methods, carrier media, and/or systems for determining sizes of defects detected on wafers more accurately than previously used methods and more accurately for different types of defects than previously used methods.